? 2003 microchip technology inc. advance information ds39619a-page 1 pic18f6410/8410 low-power features: ? power managed modes: - run: cpu on, peripherals on - idle: cpu off, peripherals on - sleep: cpu off, peripherals off power consumption modes: - pri_run: 150 a @ 1 mhz, 2v - pri_idle: 35 a @ 1 mhz, 2v - sec_run: 9.6 a @ 32 khz, 2v - sec_idle: 5.8 a @ 32 khz, 2v - rc_run: 145 a @ 1 mhz, 2v - rc_idle: 85 a @ 1 mhz, 2v - sleep: 0.1 a timer1 oscillator: 1.8 a typical @ 32 khz, 2v watchdog timer: 2.2 a @ 2v two-speed oscillator start-up flexible oscillator structure: four crystal modes: - lp: up to 200 khz - xt: up to 4 mhz - hs: up to 40 mhz - hspll: 4-10 mhz (16-40 mhz internal) two external clock modes, up to 40 mhz two external rc modes, up to 4 mhz internal oscillator block: - 8 user selectable frequencies: 31.25 khz, 125 khz, 250 khz, 500 khz, 1 mhz, 2 mhz, 4 mhz or 8 mhz - 4x pll option generates 16 mhz or 32 mhz - two modes select one or two i/o pins - osctune ? allows user to shift frequency secondary oscillator using timer1 @ 32 khz fail-safe clock monitor: - allows for safe shutdown of device if primary or secondary oscillator/clock fails external memory interface (PIC18F8410 devices only): address capability of up to 2 mbytes 16-bit/8-bit interface peripheral highlights: high current sink/source 25 ma/25 ma up to four external interrupts four 8-bit/16-bit timer/counter modules three capture/compare/pwm (ccp) modules: - capture is 16-bit, max. resolution 6.25 ns (t cy /16) - compare is 16-bit, max. resolution 100 ns (t cy ) - pwm output: pwm resolution is up to 10-bit master synchronous serial port (mssp) module with two modes of operation: - 3-wire spi? (supports all 4 spi modes) -i 2 c? master and slave mode one addressable usart module one enhanced addressable usart module: - supports lin 1.2 - auto-wake-up on start bit - auto-baud detect 10-bit, up to 12-channel a/d converter: - auto-acquisition - conversion available during sleep two analog comparators programmable reference voltage for comparators special microcontroller features: 1000 erase/write cycle flash program memory typical flash retention 100 years typical priority levels for interrupts 8 x 8 single cycle hardware multiplier power-on reset (por), power-up timer (pwrt) and oscillator start-up timer (ost) programmable brown-out reset (bor) programmable 16-level low-voltage detection (lvd) module extended watchdog timer (wdt): - programmable period from 4 ms to 131s in-circuit serial programming? (icsp?) via two pins in-circuit debug via two pins wide operating voltage range: 2.0v to 5.5v device program memory (on-board/external) data memory (bytes) i/o 10-bit a/d (channels) comparators ccp mssp (spi/ master i 2 c) eusart/ ausart timers 8-bit/16-bit bytes # single word instructions pic18f6410 16k/0 8192/0 768 54 12 2 3 y 1/1 1/3 PIC18F8410 16k/2m 8192/1m 768 70 12 2 3 y 1/1 1/3 64/80-pin high-perform ance, flash microc ontrollers with 10-bit a/d and nanowatt technology product brief 4 .com u datasheet
pic18f6410/8410 ds39619a-page 2 advance information ? 2003 microchip technology inc. pin diagrams pic18f6410 1 2 3 4 5 6 7 8 9 10 11 12 13 14 38 37 36 35 34 33 50 49 17 18 19 20 21 22 23 24 25 26 re2/cs re3 re4 re5 re6 re7/ccp2 (1) rd0/psp0 v dd v ss rd1/psp1 rd2/psp2 rd3/psp3 rd4/psp4 rd5/psp5 rd6/psp6 rd7/psp7 re1/wr re0/rd rg0/ccp3 rg1/tx2/ck2 rg2/rx2/dt2 rg3 rg5/mclr /v pp rg4 v ss v dd rf7/ss rf6/an11/c1in- rf5/an10/c1in+/cv ref rf4/an9/c2in- rf3/an8/c2in+ rf2/an7/c1out rb0/int0/flt0 rb1/int1 rb2/int2 rb3/int3 rb4/kbi0 rb5/kbi1/pgm rb6/kbi2/pgc v ss osc2/clko/ra6 osc1/clki/ra7 v dd rb7/kbi3/pgd rc4/sdi/sda rc3/sck/scl rc2/ccp1 rf0/an5 rf1/an6/c2out av dd av ss ra3/an3/v ref + ra2/an2/v ref - ra1/an1 ra0/an0 v ss v dd ra4/t0cki ra5/an4/lvdin rc1/t1osi/ccp2 (1) rc0/t1oso/t13cki rc7/rx1/dt1 rc6/tx1/ck1 rc5/sdo 15 16 31 40 39 27 28 29 30 32 48 47 46 45 44 43 42 41 54 53 52 51 58 57 56 55 60 59 64 63 62 61 64-pin tqfp note 1: the ccp2 pin placement depends on the ccp2mx fuse setting. 4 .com u datasheet
? 2003 microchip technology inc. advance information ds39619a-page 3 pic18f6410/8410 pin diagrams (cont.?d) PIC18F8410 3 4 5 6 7 8 9 10 11 12 13 14 15 16 48 47 46 45 44 43 42 41 40 39 64 63 62 61 21 22 23 24 25 26 27 28 29 30 31 32 re2/ad10/cs re3/ad11 re4/ad12 re5/ad13 re6/ad14 re7/ccp2 (1) /ad15 rd0/ad0/psp0 v dd v ss rd1/ad1/psp1 rd2/ad2/psp2 rd3/ad3/psp3 rd4/ad4/psp4 rd5/ad5/psp5 rd6/ad6/psp6 rd7/ad7/psp7 re1/ad9/wr re0/ad8/rd rg0/ccp3 rg1/tx2/ck2 rg2/rx2/dt2 rg3 rg5/mclr /v pp rg4 v ss v dd rf7/ss rb0/int0/flt0 rb1/int1 rb2/int2 rb3/int3/ccp2 (1) rb4/kbi0 rb5/kbi1/pgm rb6/kbi2/pgc v ss osc2/clko/ra6 osc1/clki/ra7 v dd rb7/kbi3/pgd rc4/sdi/sda rc3/sck/scl rc2/ccp1 rf0/an5 rf1/an6/c2out av dd av ss ra3/an3/v ref + ra2/an2/v ref - ra1/an1 ra0/an0 v ss v dd ra4/t0cki ra5/an4/lvdin rc1/t1osi/ccp2 (1) rc0/t1oso/t13cki rc7/rx1/dt1 rc6/tx1/ck1 rc5/sdo rj0/ale rj1/oe rh1/a17 rh0/a16 1 2 rh2/a18 rh3/a19 17 18 rh7 rh6 rh5 rh4 rj5/ce rj4/ba0 37 rj7/ub rj6/lb 50 49 rj2/wrl rj3/wrh 19 20 33 34 35 36 38 58 57 56 55 54 53 52 51 60 59 68 67 66 65 72 71 70 69 74 73 78 77 76 75 79 80 80-pin tqfp note 1: the ccp2 pin placement depends on the ccp2mx fuse and processor mode settings. rf5/an10/c1in+/cv ref rf4/an9/c2in- rf3/an8/c2in+ rf2/an7/c1out rf6/an11/c1in- 4 .com u datasheet
pic18f6410/8410 ds39619a-page 4 advance information ? 2003 microchip technology inc. notes: 4 .com u datasheet
ds39619a-page 5 advance information ? 2003 microchip technology inc. information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. it is your responsibility to ensure that your application m eets with your specifications. no representation or warranty is given and no liability is assumed by microchip technol ogy incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. use of microc hip?s products as critical com- ponents in life support systems is not authorized except with express written approval by mi crochip. no licenses are con- veyed, implicitly or otherwis e, under any intellectual property rights. trademarks the microchip name and logo, the microchip logo, accuron, dspic, k ee l oq , mplab, pic, picmicro, picstart, pro mate and powersmart are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. amplab, filterlab, micro id , mxdev, mxlab, picmaster, seeval and the embedded control solutions company are registered trademarks of micr ochip technology incorporated in the u.s.a. application maestro, dspicdem, dspicdem.net, ecan, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, microport, migratable memory, mpasm, mplib, mplink, mpsim, pickit, picdem, picdem.net, powercal, powerinfo, powermate, powertool, rflab, rfpic, select mode, smartsensor, smartshunt, smar ttel and total endurance are trademarks of microchip technology incorporated in the u.s.a. and other countries. serialized quick turn programming (sqtp) is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned he rein are property of their respective companies. ? 2003, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the code protection feature on microchip devices: microchip products meet the specification cont ained in their particular microchip data sheet. microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specifications contained in microchip's data sheets. most likely, the person doing so is engaged in theft of intellectual property. microchip is willing to work with the customer who is concerned about the integrity of their code. neither microchip nor any other semiconductor manufacturer c an guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are comm itted to continuously improving the code protection features of our products. attempts to break microchip?s c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received qs-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona in july 1999 and mountain view, california in march 2002. the company?s quality system processes and procedures are qs-9000 compliant for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial eeproms, microperipherals, non-volatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001 certified. 4 .com u datasheet
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